Measuring internal combustion motor cylinder compression

ABSTRACT

To obtain an electrical measurement of the compression of an internal-combustion reciprocating-piston engine via the current taken by an electric starter, during a first cycle of electrical ignition sequences successive peak values of the starter current are stored in adjacent cells of an analog memory in the rhythm of the closing flanks of the distributor breaker point output pulses with the ignition coil short-circuited. During a second cycle of ignition sequences with the ignition coil in the circuit, the first ignition pulse of a given cylinder is then fed into the first stage of a ring counter having a number of stages corresponding to the number of cylinders of the engine and assigned in reverse order to the cells of an analog memory, and is shifted along in the rhythm of the closing flanks to the end of a third cycle of ignition sequences. Starting with the stage of the ring counter marked after the end of the third cycle of ignition sequences, the peak values of the starter current stored in the analog memory are called up serially via a relay selector by means of timing pulses of a timing generator which are fed to the ring counter via a switching network which is programmed according to the ignition sequence applicable to the engine.

United States Patent [191 Maringer MEASURING INTERNAL COMBUSTION MOTOR CYLINDER COMPRESSION Albert Maringer, Karlsruhe, Germany [75] Inventor:

[22] Filed: Feb. 15, 1973 [21] Appl. No.: 332,657

[30] Foreign Application Priority Data Feb, 18, 1972 Germany .1 2207789 [52] us. 131. 73/115 [51] Int. Cl. 601m 15/00 [58] Field of Search 73/115, 116 118 [56] References Cited UNITED STATES PATENTS 3,100,988 8/1963 Mansfield 73/116 3,186,218 6/1965 Hollis 73/118 X 3,389,599 6/1968 Beale 73/115 3,421,367 l/l969 Mears et al. 73/116 3,543,572 12/1970 Summerer et al.. 73/116 3,625,054 12/1971 Vesper et al 73/115 Primary ExaminerRichard C. Queisser Assistant ExaminerStephen A. Dreitman Attorney, Agent, or FirmKenyon & Kenyon Reilly Carr & Chapin [451 July 16, 1974 [57] ABSTRACT To obtain an electrical measurement of the compression of an internal-combustion reciprocating-piston engine via the current taken by an electric starter, during a first cycle of electrical ignition sequences successive peak values of the starter current are stored in adjacent cells of an analog memory in the rhythm of the closing flanks of the distributor breaker point output pulses with the ignition coil short-circuited. During a second cycle of ignition sequences with the ignition coil in the circuit, the first ignition pulse of a given cylinder is then fed into the first stage of a ring counter having a number of stages corresponding to the number of cylinders of the engine and assigned in reverse order to the cells of an analog memory, and is shifted along in the rhythm of the closing flanks to the end of a third cycle of ignition sequences. Starting with the stage of the ring counter marked after the end of the third cycle of ignition sequences, the peak values of the starter current stored in the analog memory are called up serially via a relay selector by means of timing pulses of a timing generator which are fed to 1 the ring counter via a switching network which is programmed according to the ignition sequence applicable to the engine.

6 Claims, 1 Drawing Figure MEASURING INTERNAL COMBUSTION MOTOR CYLINDER COMPRESSION BACKGROUND OF THE INVENTION Engines of the internal combustion, multi-cylinder, reciprocating piston type having electric starting motors and electric ignition controlled by an electric circuit maker and breaker, timed according to the firing of the cylinders, are in extensive use. An example is the usual automobile engine having an electricstarter and an electric ignition system including a distributor having breaker points and an ignition coil, the breaker points closing to charge the coil and then opening, the high voltage from the coil being transmitted to the appropriate cylinder by the rotor in the distributor.

Such an engine does not operate properly unless adequate compression is obtained in each of the cylinders and in a substantially uniform manner throughout all of the cylinders. It is customary to test the cylinder compression directly by means .of a pressure gauge, but this is time-consuming, necessitating the removal of each spark plug fed by the distributor, the application of a pressure gauge, and replacement of the spark plug.

SUMMARY OF THE INVENTION This invention involves the electrical measurement of the cylinder compressions of such an engine via the current taken by its electric starter. In this indirect measurement of the compression of individual cylinders of such engines by detecting the changes of the starter current, the measured compression values are obtained in the firing sequence set for each motor type, but without fixation of a first cylinder for a measurement cycle.

The measuring described is based on the fact that during the starting process the starter must supply more work as the gas and/or vapor mixture in a cylinder is being compressed. The increase in energy results in an increased instantaneous starter current, the magnitude of which is proportional to the compression of the respective cylinder in which the compression takes place. The starter current consists therefore of a DC component which serves to overcome the friction in the uniformly moved parts, and an AC component which corresponds to the compression as it increases to a peak value and then decreases. This AC component can be filtered out from the starter current and be processed.

It is an object of the present invention to correlate the measurement values which, as mentioned above, are delivered with an arbitrary start and are stored according to the firing order of the individual cylinders and to read themout sorted according to the numbering sequence of the cylinders.

The above is attained according to this invention by the provision that during a first cycle of ignition 'sequences successive peak values of the starter. current are stored in adjacent cells of an analog memory in the rhythm of the closing flanks of the interrupter with the ignition coil short-circuited, and during'a second cycle of ignition sequences, which follows the first ignition pulse of a given cylinder is fed, with the ignition coil in the circuit, into the first stage of a ring counter having a number of stages corresponding to the number of cylinders and assigned via a relay selector or the like in reverse order to the cells of the analog memory, and is shifted along in the rhythm of the closing flanks of the pulses to the end of a third cycle of ignition sequences. Then, starting with the stage of the ring counter marked after the end of the third cycle of ignition sequences, the peak values of the starter current stored in the analog memory are called up serially via the relay selector by means of timing pulses of a timing generator which are fed to the ring counter via a switching network which is programmed according to the firing sequence applicable to the engine.

If the ignition order is uniform, i.e., if the cylinder numbering occurs in the course of the ignition sequence in ascending or descending order, the programmed switching network may be unnecessary and the ring counter can be advanced directly by the timing pulses of a timing generator.

1 The compression values which are storedin the cells of the analog memory according to the firing sequence, but with the starting cylinder undefined, can be taken in this manner from the memory cells in the order of the cylinder numbering and evaluated. The compression value of a given cylinder can, for instance, be recorded in any memory cell, but in the subsequent callup it is nevertheless picked up in the desired order.

The switching network, which is programmed according to the firing sequence applicable in each case,

takes account of the fact that different engine types may have different firing sequences, so that various different engine types can be measured by the method.

An arrangement for carrying out the method contains advantageously n successive memory cells of an analog memory for voltages proportional to the compression, which via an access or hold input each are connected with outputs of a ring counter which has (n i, when n the number of cylinders) stages and is controlled by the interrupter, or ignition breaker points, in such a manner that the output of the first stage is connected to the access input of the first memory cell and the outputs of all following stages are connected to the respective hold inputs of the preceding and to the access inputs of the following cells.

BRIEF DESCRIPTION OF THE DRAWING The single FIGURE of the drawings illustrates schematically a preferred embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT For easier understanding the above FIGURE is subdivided into three sections by dash-dotted lines. The leftbreaker points, are fed to the circuit via an input pulse shaper ESl. Via a pulse shaper B52 in the right-hand upper section of the FIGURE, the circuit is connected with an ignition pulse transmitter Z, which iscoupled to the ignition wire of a given cylinder, shown as being with the engine to be measured via three inputs. Interrupter pulses, from the cylinder 1 of a four cylinder engine. An analog memory SP is finally connected via an input amplifier V with the ends of a ground strap MB, which connects one of the brushes of the starter motor M with ground. The ground strap serves as a starter current measuring resistor.

The inputs E1, E2, E3 and E4 serve for the control of the process. E1 represents a signal input to which at the beginning of a storing operation a logical 1 signal is applied. It is connected with an input terminal of a bistable flipflop which is formed by two NAND gates G1 and G2. The other input terminal of this bistable flipflop is connected with the signal input E2 via an amplifier T1. The input E1 is furthermore connected with one input terminal of a'NAND gate G3, its other input terminal being tied to the input E3. To this input is fed a starting pulse, which imparts a logical signal to the input E3. The input E3 is further connected with an input terminal of a second bistable flipflop consisting of the NAND gates G7 and G8. To the other input of this bistable flipflop is connected the input E4, to which for interrogating (calling up) the stored compression values a logical 1 potential must be applied. The output of the NAND gate G3 is connected via an inverter ll with the resetting inputs of a counter Z1 and of two ring counters R21 and RZ2, respectively.

The pulse shaper B81 is connected on the input side with an interrupter, or breaker point, contact U of the ignition coil ZS of the engine. In shunt with the interrupter contact is a low resistance 1 in'series with or controlled by a relay contact r. The relay contact r is actuated by a relay solenoid R which is energized via a NAND gate G4 from the input E1. The inverting output of the pulse shaper B81 is connected with the clock input of a flipflop FFl, the D input and the resetting input of which are connected to the output of the bistable flipflop consisting of the NAND gates G1 and G2. The output of the pulse shaper B51 is further connected via an inverter [3 with the clock inputs of the ring counter R21 and the counter Z1. Via a further inverter I4 in series with an inverter 16, the clock input of the ring counter RZ2 is also connected with the output of the inverter I3.

Into the connecting line between the inverters I3 and I4 is fed, via a further inverter I2, the output signal of the output Q of the flipflop FFl. The output of the inverter l4, to which at the same time a positive potential is applied via a resistor 2, is connected to the clock input of the second counter Z2, which is part of the interrogation control. The two latter stages of the fourstage counter Z1 are connected via a NAND gate G5 nected with the setting input of the first stage of the four-stage ring counter RZ2.

The ring counter RZl is a five-stage ring counter. The output of the first stage of this ring counter is connected with an access input S of the first memory cell of the memory SP. The outputs of all following stages of the ring counter RZl are connected to the respective hold inputs of the preceding and to access inputs S of the succeeding cells of the memory SP. The fifth stage of the ring counter R21 is also connected via an inverter 17 to the second input of the NAND gate G4 which excites the relay solenoid R. Outputs of the memory stages are connected via contacts a to d with a lines which leads to an elevator, not specifically shown, for the stored analog values, for instance, to a voltage-frequency converter. Four outputs of the fourstage ring counter RZ2 excite via four inverters four relay solenoids A to D which actuate the contacts a to d. As will be seen from the correlation of the relay contacts a to d with the relays A to D, the outputs of the stages of the ring counter RZ2 are correlated to the outputs of the memory cells of the memory SP in reverse order.

The previously mentioned second bistable flipflop consisting of the NAND gates G7 and G8 connects the output belonging to the NAND stage G7 with the reset input of the counter Z2. The clock input of this counter is, as will be remembered, connected with the output of the pulse shaper ESl via the inverters I3 and I4. This input is furthermore connected via a NAND gate G9 with the Z output of a flipflop FF2, and via the second input of the NAND gate G9 with the output of a clock generator TG which is also connected to the clock input of the flipflop FF2. The output, associated with the NAND gate G8, of the second bistable flipflop, is connected with a D input and also with the resetting input of the flipflop FF2. To this connection is further applied, via a resistor 3, a positive potential, and via an amplifier T2, the output of a NAND gate G10 with a total of .five inputs. Four of these inputs can be connected via programmable double-pole switches PSW alternatingly to mutually inverse outputs of the four stages of the counter Z2. A fifth input. of the NAND gate G10 is connected to ground via a capacitor 4 and to a positive potential via a resistor S. This input of the NAND gate G10 is further connected, via an inverter 15, with the line leading to the clock input of the counter Z2.

The method of operating according to this invention .is as follows:

Upon the command Store Program, transmitted by a continuous logical 1 signal at the input E1, the first bistable circuit consisting of the gates G1 and G2 is put in the ready position. By this command the NAND gates G3 and G4 are also put in the enabled or ready position. A start pulse is transmitted from the input E3 to reset via the gate G3 and the inverter I1, the two ring counters RZl, RZ2 and the counter Z1. The circuit is thereby placed in the starting position. Furthermore, the relay R solenoid is energized via the inverter 17 and the NAND gate G4 by the signal at E1, so that the low resistance 1 is placed via the contacts r of the relay, in parallel with the interrupter contact U, or breaker points, of the ignition system of the engine. The engine is thereby prevented from starting when the starter M is operated Subsequently, the starter M is operated and after a warmup time of about 3 seconds, a second start pulse is applied to the input E2. This pulse sets the bistable flipflop formed by the NAND gates G1 and G2. It thereby enables the flipflop FF 1. This flipflop synchronizes the circuit to the correct phase of the interrupter contact pulses normalized by means of the pulse shaper ESl. The ring counters R21 and RZ2 are advanced by the closing flanks of the interrupter contact pulses. The memory cells of the analog memory SP are peak-value storage devices and must therefore be released for access only prior to the occurrence of the voltage peaks to be stored, which arrive via the amplifier V. The release takes place via the access inputs S of the memory cells. If a voltage peak is stored, the hold input H of the memory cell just addressed is activated via the respective output of the ring counter RZl after the next closing flank of the interrupter contact.

By way of example, the first synchronized closing flank of the interrupter contact pulse sets the first stage of the ring counter R21 and thereby activates the access input of the first memory cell. This memory cell takes in the peak of the half-wave of the AC compo nents of the starter current that follows the closing flank. The next closing flank sets the second stage of the ring counter R21 and thereby activates the hold input H of the first memory cell and the access input S of the second memory cell, which is thereby open for the next voltage peak. By the fifth closing flank, finally, the hold input of the fourth memory cell is activated. With that, the analog values of the compressionproportional voltage are stored. The output signal of the fifth stage of the ring counter RZl deenergizes the solenoid R, via the inverter 17 and the NAND gate G4. The contacts r open and the ignition can now function without impediment when the interrupter contact opening following its fifth closing takes place. In other words, the fifth circuit breaker actionfires the first cylinder compression measured.

During the first cycle of sequences the compression values for the cylinders l of the engine are stored in numerical order in the cells of the analog memory SP having the same numerical order, so the cylinder first compression measured must now be ignited with the first spark in the following or active ignition sequence cycle, the interrupter contact now no longer being shortcircuited. The ignition pulse transmitter Z which taps the ignition wire for this chosen cylinder, provides a voltage pulse which sets the first stage of the ring counter RZ2 via the pulse shaper ES2. With the following sixth closing flank of the pulses from the pulse shaper ESl, this voltage pulse, stored initially in the first stage of the ring counter RZ2, is transferred to the second stage of the ring counter RZ2. Each further closing flank of the pulses from ESl shifts this information, identifying the chosen cylinder, by one stage. From the fourth stage the first stage is again setvia a feedback path.

After the twelfth closing flank, i.e., after the third cycle of ignition sequences, the fourth stage in the ring counter RZ2 is loaded again. Simultaneously the counter Z1 has reached the count 12 and resets the first bistable circuit, which consists of the NAND gates G1 and G2, via the NAND gate G5. Thereby the flipflop FF 1 is also reset. Starting from the Q output of the latter, all interrupter or breaker point contact pulses transmitted by ESl through the inverter [3,are' blocked via the inverter I2. The correlation information stored in the ring counter RZ2 is therefore preserved, as also the NAND gate G6is blocked by the 0 output of the flipflop FF 1 and no longer receives pulses from the ignition line of the cylinder 1. By shifting the ignition pulse information for the cylinder 1 in the ring counter RZ2 to the end of the third ignition sequence cycle, the other compression values stored in the cells of the analog memory SP have also been correlated with definite stages of the ring counter RZ2. If, for instance, the value for the cylinder 1 is stored in the fourth cell of the analog memory SP, the pulse shaper ES2 transmits the ignition pulse of this cylinder only after the eighth closing flank. With the ninth, tenth, eleventh and twelfth closing flank the ignition pulse information is shifted via the second, third, fourth stage of the ring counter RZ2 to the latters first stage. The first stage is associated, as will be seen, with the fourth memory cell, so that the correlation is correct.

When calling up the individual analog values from the memory cells, it is desirable that these values appear in the order: cylinder 1, cylinder 2, cylinder 3, cylinder 4. In the present example, the correlation was made with respect to the ignition pulse'for the cylinder 1. In the ring counter RZ2 the stage corresponding to the memory cell with the analog value for the cylinder 1 is already set and the interrogation relay A is thereby energized, which connects the desired analog value via its contact a to the output bus.

If, as in the example, the value for the cylinder 1 is stored in the first memory cell and the firing order of the engine is given as l, 3, 4, 2, the fourth stage of the ring counter RZ2 must be flipped. In the readout the value stored for the cylinder 2 is to be read out as the next value, which is stored in the fourth memory cell of the analog memory SP. In order to achieve this, the ring counter RZ2 must be shifted by one pulse. Thereby, its

first stage is loaded and the relay D isenergized. The content of the fourth memory cell is fed to the bus via the contact d.

- The shift pulses for the ring counter, which cause the interrogation (call-up) of the analog values following the first one, are generated in the interrogation control section. For this purpose, a step must be programmed in the programmed switching circuit PSW, which is set by the double-throw contacts at the inverted and noninverted outputs of the counter Z2. Thus, the first switch at the left is positioned at the left-hand stop. Via

the input E4, furthermore, the program lnterrogate Memory, is selected. Thereby the second bistable flipflop consisting of the NAND gates G7 and G8 is enabled. With a further start pulse via the input E3, this bistable circuit flips and releases theflipflop F F2, which synchronizes the interrogation control with the pulse sequenceof the timing (clock) pulse generator TG. If subsequently the NAND gate G9 has transmitted a clock pulse to the counter Z2 and to the ring counter RZ2, all inputs at the NAND gate G10 are at logical 1 potential. (This is delayed via the inverter I5). The amplifier T2 thereupon resets the flipflop F F2 and the bistable flipflop consisting of the NAND gates G7 and G8. Thus, the first stage in the ring counter RZ2 is tripped and the fourth storage cell with the analog value for cylinder 2, stored therein, is interrogated.

The value to be called up next is that for cylinder 3. According to the present example, this value is stored in the second memory cell. To select this memory cell, two shift pulses must be counted into the ring counter RZ2. To this end, the second contact from the left in the programmed switching circuit PSW is brought to the left-hand stop. The interrogation control transmits two timing pulses after the start pulse.

Lastly, the analog value stored for cylinder 4 is to be called up. This value is stored in the third memory cell. To interrogate it, the second stage in the ring counter RZ2 must therefore be tripped. This, however, requires three shift pulses from the interrogation control unit, as the third stage was previously'tripped. The-position of the programmed switching circuit PSW required therefor can be seen in the FIGURE. Thus, all values can therefore be interrogated in any desired order, regardless of the memory cell in which the value for the given cylinder, which in the example is cylinder 1, is found. Important for the interrogation is the firing sequence, which corresponds to the sequence of storing.

The method provides still further degrees of freedom. The ignition pulse signal via the pulse shaper BS2 need not be derived from the ignition wire to the cylinder 1. It is completely optional concerning which of the cylinders is to be designated. All shifts that become necessary through the selection of a particular cylinder for furnishing the ignition pulse can be performed by means of the interrogation control unit. v

What is claimed is:

1. An apparatus for measuring the cylinder compression of an internal combustion, reciprocating piston type engine including an electric starting motor, and an electric ignition system which is controlled by breaker points and is timed according to the firing order of the cylinders, the apparatus comprising:

means, coupled to said starting motor, for measuring the peak current values of the current drawn by said motor while driving the engine through a first one of a series of ignition cycles in which all of the pistons of-the engine are moved through one compression stroke;

means, coupled to said breaker points, for short circuiting said points during said one ignition cycle during which said motor current is measured;

means, including a series of analog memory cells,

coupled to said current measuring means, for storing said peak current values in order as measured in said memory cells;

a pulse counter, coupled to said breaker points, having a series of stages, the number of which corresponds to the number of cylinders of the engine, and which are assigned in reverse serial order to said analog memory cells, including a feedback connection between a last and a first stage of said series of stages;

means, coupled to said pulse counter, for generating a set pulse in response to a selected ignition voltage pulse generated during a second ignition cycle for firing a predetermined cylinder of the engine, said set pulse being transmitted to said pulse counter for setting the first stage of said counter and storing said set pulse therein, the ignition pulses generated by said breaker points, subsequent to the generation of said set pulse and through a third ignition cycle, shifting said set pulse stored in said first stage successively through said stages so that said set pulse is stored at the end of said third ignition cycle in a stage of said counter which is assigned to the memory cell in which the peak current value for said predetermined cylinder is stored;

means, coupled to said pulse counter, for disabling said counter at the end of said third ignition cycle; and 7 means, coupled to said counter, for reading out said peak current values from said memory cells in a predetermined order.

2. The apparatus recited in claim 1, wherein said current value read out means includes a relay selector comprising .a plurality of relays, the coils of which are coupled to selected stages of said pulse counter and the contact switches of which are coupled to corresponding ones of said memory cells in said reverse serial order.

3. The apparatus recited in claim 2, wherein said current value read out means reads out said current values from said memory cells in successive order starting with the memory cell in which the peak current value for said predetermined cylinder is stored, and includes a timing pulse generator coupled to said pulse counter for shifting said set pulse to successive stages of said counter and thereby activating said relay contact switches in successive order.

4. The apparatus recited in claim 2, wherein said current value read out means includes a timing pulse generator coupled to said pulse counter for generating shift pulses for shifting said set pulse through said counter stages, and a programmable switching circuit, coupled to said timing pulse generator, for selectively transmit-' ting said shift pulses to said pulse counter and shifting said set pulse through said counter stages so as to activate said relay switches in said predetermined order.

5. The apparatus recited in claim 1, wherein said peak current value storing means includes n analog memory cells each having an access and hold input, and wherein said current measuring means comprises a pulse counter, having n 1 serial stages, coupled to said breaker points, the output of a first of said n 1 stages being coupled to the acess input of a corresponding first of said memory cells, and the output of each successive one of said n 1 stages up to and including the nthstage being coupled to the respective hold input of said memory cell preceding the memory cell corresponding thereto.

6. A method for the measurement of the cylinder compression of an internal combustion, reciprocating piston type engine, including an electric starting motor and an electric ignition system which is controlled by breaker points and is timed according to the firing order of the cylinders, comprising the steps of:

measuring the peak current values of the current drawn by the starter motor while driving the engine by means of said motor through one ignition cycle in which all of the pistons of the engine are moved through one compression stroke and the breaker points of the ignition system are short circuited; storing the peak current values in the order measured in a memory devices having a series of separate memory cells; generating ignition pulses during a second ignition cycle, and an output signal in response to the ignition pulse generated for firing a selected one'of the engine cylidners; transmitting the generated output signal to a counter having a series of stages assigned to the memory cells of the memory device in reverse order for setting the first stage thereof and storing said output signal therein; determining the memory cell in which'the peak current value corresponding to said selected cylinder is stored by transmitting the ignition pulses generate'd subsequent to said pulse generated 'for'firing said selected-cylinder during said second ignition cycle and during a third ignition cycle to the counter for shifting said output signal through the stages thereof, the stage in which said output signal is stored at the end of said third ignition cycle corresponding to the memory cell in which said selected cylinder peak value is stored; and readingout the stored peak current values from said memory cells in a predetermined order. 

1. An apparatus for measuring the cylinder compression of an internal combustion, reciprocating piston type engine including an electric starting motor, and an electric ignition system which is controlled by breaker points and is timed according to the firing order of the cylinders, the apparatus comprising: means, coupled to said starting motor, for measuring the peak current values of the current drawn by said motor while driving the engine through a first one of a series of ignition cycles in which all of the pistons of the engine are moved through one compression stroke; means, coupled to said breaker points, for short circuiting said points during said one ignition cycle during which said motor current is measured; means, including a series of analog memory cells, coupled to said current measuring means, for storing said peak current values in order as measured in said memory cells; a pulse counter, coupled to said breaker points, having a series of stages, the number of which corresponds to the number of cylinders of the engine, and which are assigned in reverse serial order to said analog memory cells, including a feedback connection between a last and a first stage of said series of stages; means, coupled to said pulse counter, for generating a set pulse in response to a selected ignition voltage pulse generated during a second ignition cycle for firing a predetermined cylinder of the engine, said set pulse being transmitted to said pulse counter for setting the first stage of said counter and storing said set pulse therein, the ignition pulses generated by said breaker points, subsequent to the generation of said set pulse and through a third ignition cycle, shifting said set pulse stored in said first stage successively through said stages so that said set pulse is stored at the end of said third ignition cycle in a stage of said counter which is assigned to the memory cell in which the peak current value for said predetermined cylinder is stored; means, coupled to said pulse counter, for disabling said counter at the end of said third ignition cycle; and means, coupled to said counter, for reading out said peak current values from said memory cells in a predetermined order.
 2. The apparatus recited in claim 1, wherein said current value read out means includes a relay selector comprising a plurality of relays, the coils of which are coupled to selected stages of said pulse counter and the contact switches of which are coupled to corresponding ones of said memory cells in said reverse serial order.
 3. The apparatus recited in claim 2, wherein said current value read out means reads out said current values from said memory cells in successive order starting with the memory cell in which the peak current value for said predetermined cylinder is stored, and includes a timing pulse generator coupled to said pulse counter for shifting said set pulse to successive stages of said counter and thereby activating said relay contact switches in successive order.
 4. The apparatus recited in claim 2, wherein said current value read out means includes a timing pulse generator coupled to said pulse counter for generating shift pulses for shifting said set pulse through said counter stages, and a programmable switching circuit, coupled to said timing pulse generator, for selectively transmitting said shift pulses to said pulse counter and shifting said set pulse through said counter stages so as to activate said relay switches in said predetermined order.
 5. The apparatus recited in claim 1, wherein said peak current value storing means includes n analog memory cells each having an access and hold input, and wherein said current measuring means comprises a pulse counter, having n + 1 serial stages, coupled to said breaker points, the output of a first of said n + 1 stages being coupled to the acess input of a corresponding first of said memory cells, and the output of each successive one of said n + 1 stages up to and including the nth stage being coupled to the respective hold input of said memory cell preceding the memory cell corresponding thereto.
 6. A method for the measurement of the cylinder compression of an internal combustion, reciprocating piston type engine, including an electric starting motor and an electric ignition system which is controlled by breaker points and is timed according to the firing order of the cylinders, comprising the steps of: measuring the peak current values of the current drawn by the starter motor while driving the engine by means of said motor through one ignition cycle in which all of the pistons of the engine are moved through one compression stroke and the breaker points of the ignition system are short circuited; storing the peak current values in the order measured in a memory devices having a series of separate memory cells; generating ignition pulses during a second ignition cycle, and an output signal in response to the ignition pulse generated for firing a selected one of the engine cylidners; transmitting the generated output signal to a counter having a series of stages assigned to the memory cells of the memory device in reverse order for setting the first stage thereof and storing said output signal therein; determining the memory cell in which the peak current value corresponding to said selected cylinder is stored by transmitting the ignition pulses generated subsequent to said pulse generated for firing said selected cylinder during said second ignition cycle and during a third ignition cycle to the counter for shifting said output signal through the stages thereof, the stage in which said output signal is stored at the end of said third ignition cycle corresponding to the memory cell in which said selected cylinder peak value is stored; and reading out the stored peak current values from said memory cells in a predetermined order. 